Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
0 | a | a; AN-YEU(ANDY) WU ; 吳安宇 | | | | |
2006 | A "Medium-Field" Multivariate Public-Key Encryption Scheme | Lih-Chung Wang; Bo-Yin Yang; Yuh-Hua Hu; FEI-PEI LAI | The Cryptographers' Track at the RSA Conference | | | |
2014 | A 'hidden' 18 O-enriched reservoir in the sub-arc mantle | Liu, C.-Z.; Wu, F.-Y.; Chung, S.-L.; Li, Q.-L.; Sun, W.-D.; Ji, W.-Q.; SUN-LIN CHUNG | Scientific Reports | 47 | 39 | |
2009 | A + B model in Quantum Geometry | Wang, Chin-Lung | Presentation for MOE | | | |
2015 | A + B theory in conifold transitions for Calabi-Yau threefolds | Lin, Hui-Wen ; Lee, Y.-P.; Wang, C.-L. | | | | |
2015 | A + B theory in conifold transitions of Calabi--Yau threefolds | Wang, Chin-Lung ; Lee, Y.-P.; Lin, H.-W. | arXiv | | | |
2013 | A 0.004mm2 single-channel 6-bit 1.25GS/s SAR ADC in 40nm CMOS | Tai, H.-Y.; Tsai, P.-Y.; Tsai, C.-H.; HSIN-SHU CHEN | 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013 | 2 | 0 | |
2010 | A 0.02-mm2 9-bit 50-MS/s Cyclic ADC in a 90-nm Digital CMOS Technology | Yen-Chuan Huang; Tai-Cheng Lee; TAI-CHENG LEE | IEEE Journal of Solid-State Circuits | 19 | 18 | |
2010 | A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine | Cheng, C.-C.; Tsai, Y.-M.; Chen, L.-G.; Ch; rakasan, A.P.; LIANG-GEE CHEN | Custom Integrated Circuits Conference | 7 | 0 | |
2005 | A 0.1-25.5-GHz differential cascaded-distributed amplifier in 0.18-μm CMOS Technology | Chihun Lee; Lan-Chou Cho; Shen-Iuan Liu; SHEN-IUAN LIU | IEEE Asian Solid-State Circuits | 12 | 0 | |
2007 | A 0.13μm hardware-efficient probabilistic-based noise-tolerant circuit design and implementation with 24.5dB noise-immunity improvement | AN-YEU(ANDY) WU ; Wey, I.-C.; Chen, Y.-G.; Yu, C.; Chen, J.; Wu, A.-Y.; AN-YEU(ANDY) WU | 2007 IEEE Asian Solid-State Circuits Conference | | | |
2011 | A 0.16nJ/bit/iteration 3.38mm 2 turbo decoder chip for WiMAX/LTE standards | AN-YEU(ANDY) WU ; Lin, C.-H.; Chen, C.-Y.; Chang, E.-J.; AN-YEU(ANDY) WU | 2011 International Symposium on Integrated Circuits | | | |
2012 | A 0.18 um CMOS self-mixing frequency tripler | Y.-T. Lo; J.-F. Kiang; JEAN-FU KIANG | IEEE Microwave and Wireless Components Letters | 19 | 17 | |
2013 | A 0.18-μ m CMOS Dual-band frequency synthesizer with spur reduction calibration | Chen, Y.-W.; Yu, Y.-H.; Chen, Y.-J.E.; YI-JAN EMERY CHEN | IEEE Microwave and Wireless Components Letters | 28 | 26 | |
2008 | A 0.18-μm CMOS 1.25-Gbps automatic-gain-control amplifier | I-Hsin Wang; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 33 | 22 | |
2010 | A 0.18-μm CMOS RF transceiver with self-detection and calibration functions for bluetooth V2.1 + EDR applications | Hu, W.-Y.; Lin, J.-W.; Tien, K.-C.; Hsieh, Y.-H.; Chen, C.-L.; Tso, H.-T.; Shih, Y.-S.; Hu, S.-C.; Chen, S.-J.; SAO-JIE CHEN | IEEE Transactions on Microwave Theory and Techniques | 11 | 8 | |
2006 | A 0.18μm CMOS receiver for 3.1 to 10.6GHz MB-OFDM UWB communication systems | Yen-Horng Chen; Chih-Wei Wang; Ching-Feng Lee; Jen-Lung Liu; Tzu-Yi Yang; Chih-Fan Liao; Che-Fu Liang; Gin-Kou Ma; Shen-Iuan Liu; SHEN-IUAN LIU | 2006 RFIC Symposium | | | |
2012 | A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression | T.-T. Liu; J. Rabaey; TSUNG-TE LIU | IEEE Symposium on VLSI Circuits | 4 | 0 | |
2013 | A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression | Liu, T.-T.; Rabaey, J.M.; TSUNG-TE LIU | IEEE Journal of Solid-State Circuits | 4 | 29 | |
2004 | A 0.3-25-GHz ultra-wideband mixer using commercial 0.18-/spl mu/m CMOS technology | Ming-Da Tsai; HUEI WANG | IEEE Microwave and Wireless Components Letters | | | |