第 1 到 10 筆結果,共 10 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 2009 | Logic Synthesis in a Nutshell | Jie-Hong R. Jiang; Srinivas Devadas; JIE-HONG JIANG | ||||
2 | 2009 | Logic Synthesis in a Nutshell | Jiang, J.H.; Devadas, S.; JIE-HONG JIANG | Electronic Design Automation | |||
3 | 2010 | Hardware Equivalence and Property Verification. | Jiang, Jie-Hong Roland; Villa, Tiziano; Crama, Yves; Hammer, Peter L.; JIE-HONG JIANG | Boolean Models and Methods in Mathematics, Computer Science, and Engineering | |||
4 | 2010 | Hardware Equivalence and Property Verification | Jie-Hong R. Jiang; Tiziano Villa; JIE-HONG JIANG | ||||
5 | 2011 | Extracting Functions from Boolean Relations Using SAT and Interpolation | Jie-Hong Rol; Jiang, Hsuan-Po Lin; Wei-Lun Hung; JIE-HONG JIANG | ||||
6 | 2011 | Extracting functions from boolean relations using SAT and interpolation | Jiang, J.-H.R.; Lin, H.-P.; Hung, W.-L.; JIE-HONG JIANG | Advanced Techniques in Logic Synthesis, Optimizations and Applications | |||
7 | 2011 | Bi-decomposition Using SAT and Interpolation | Ruei-Rung Lee; Jie-Hong Rol Jiang; Wei-Lun Hung; JIE-HONG JIANG | ||||
8 | 2011 | Bi-decomposition using SAT and interpolation | Lee, R.-R.; Jiang, J.-H.R.; Hung, W.-L.; JIE-HONG JIANG | Advanced Techniques in Logic Synthesis, Optimizations and Applications | |||
9 | 2011 | Ashenhurst Decomposition Using SAT and Interpolation | Hsuan-Po Lin; Jie-Hong Rol Jiang; Ruei-Rung Lee; JIE-HONG JIANG ; Hsuan-Po Lin;Jie-Hong Rol Jiang;Ruei-Rung Lee | ||||
10 | 2011 | Ashenhurst decomposition using SAT and interpolation | Lin, H.-P.; Jiang, J.-H.R.; Lee, R.-R.; JIE-HONG JIANG | Advanced Techniques in Logic Synthesis, Optimizations and Applications |