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.National Taiwan University / 國立臺灣大學
Project / 研究計畫
兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(3/3)
兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(3/3)
Details
Primary Data
Project title
兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(3/3)
Internal ID
96-2221-E-002-287-
Principal Investigator
CHUNG-YANG HUANG
Start Date
August 1, 2007
End Date
July 31, 2008
Partner Organizations
National Science and Technology Council