Design and Implementation of an FPGA-Based 16-Channel Data/Timing Formatter

Journal

Proceedings of the Asian Test Symposium

Journal Volume

2018-October

Pages

209-214

Date Issued

2018

Author(s)

Hou, G.-H.

Huang, W.-C.

Huang, J.-L.

Kuo, T.

JIUN-LANG HUANG

DOI

10.1109/ATS.2018.00047

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/501345

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-85060058409&doi=10.1109%2fATS.2018.00047&partnerID=40&md5=6a5469062f189aa7abf39be48d203c59

Type

conference paper