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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
An on-chip short-time interval measurement technique for testing high-speed communication links
Details
An on-chip short-time interval measurement technique for testing high-speed communication links
Journal
VLSI Test Symposium
Pages
380-385
Date Issued
2001-01
Author(s)
J.L. Huang
K.T. Cheng
JIUN-LANG HUANG
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/294579
Type
conference paper
