On-Chip Analog Response Extraction with 1-Bit Sigma-Delta Modulators
Journal
Asian Test Symposium
Pages
49-54
Date Issued
2002-11
Author(s)
Abstract
Because of their relative robustness to process variation, /spl Sigma/-/spl Delta/ modulation techniques are particularly suitable for VLSI implementations. In this paper, we propose to employ the 1-bit /spl Sigma/-/spl Delta/ modulation ADC (analog-to-digital converter) as the on-chip analog response extractor for analog/mixed-signal BIST (built-in self-test) applications. To validate the idea, a prototype chip with the proposed BIST circuitry has been designed and fabricated. Performance of the BIST circuitry is validated (up to 87 dB dynamic range), and measurement results of the circuit under test (CUT), a 2nd-order low-pass filter, are presented.
Type
conference paper