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  4. Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies
 
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Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it's potential applications for Power-Via technologies

Journal
Proceedings - Electronic Components and Technology Conference
Journal Volume
2022-May
ISBN
9781665479431
Date Issued
2022-01-01
Author(s)
Liao, Bo Zhou
Chen, Liang Hsi
Chen, Kai Cheng
Lin, Hong Yi
Tsai, Yi Ting
Chen, Ting Wei
Chan, Yi Cheng
Lee, Min Hung
MING-HAN LIAO  
DOI
10.1109/ECTC51906.2022.00285
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/631943
URL
https://api.elsevier.com/content/abstract/scopus_id/85134687693
Abstract
In this work, carbon nanotubes (CNTs) are grown as advanced filler materials in through-silicon via (TSV). Electrical and thermal properties of CNTs are extracted by experiments and the implementation of multi-layer stacking is proposed. The resistance and thermal conductivity of CNT are measured as 10.5 ohm and 49 W/mK respectively. In accordance with its superior properties over copper, Carbon nanotubes as TSVs (CNT-TSV) have several advantages in three-dimensional integrated circuit (3DIC) technology. Signal integrity index, namely return loss and insertion loss have been evaluated by ANSYS HFSS (High frequency Structure Simulator). Within the high frequency interval (10~20 GHz), CNT-TSV has better electrical characteristics than copper. In summary, CNTs can be a promising material used in future chip on wafer stacking process.
Subjects
3DIC | CNT | signal integrity | thermal conductivity | TSV
Type
conference paper

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