Device-level transient analysis of a 1 μm six-transistor BiCMOS inverter circuit using a large-scale quasi-3D device simulator
Resource
Bipolar Circuits and Technology Meeting, 1991., Proceedings of the 1991
Journal
Bipolar Circuits and Technology Meeting, 1991.
Pages
-
Date Issued
1991-09
Date
1991-09
Author(s)
Kuo, J.B.
Chen, Y.W.
DOI
N/A
Abstract
The authors present a device-level study on the transient behavior of a 1- mu m six-transistor BiCMOS inverter circuit using a large-scale quasi-3-D device simulator, derived from PISCES-2B, in which layout information on each transistor and an efficient large-scale simulation capability have been added. According to simulation results, the speed performance of the BiCMOS inverter is determined by the charge transport in the base of the pull-up bipolar device, which is controlled by the circuit operating conditions set by the associated NMOS and PMOS devices.>
Type
journal article
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