https://scholars.lib.ntu.edu.tw/handle/123456789/149698
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, J. S. | zh-TW |
dc.contributor.author | 林呈祥 | zh-TW |
dc.contributor.author | Lin, Chen-Shang | en |
dc.creator | Chang, J. S.;林呈祥 | zh-TW |
dc.creator | Chang, J. S.;Lin, Chen-Shang | en |
dc.date | 1994 | en |
dc.date.accessioned | 2009-02-04T21:07:17Z | - |
dc.date.accessioned | 2018-07-06T11:02:17Z | - |
dc.date.available | 2009-02-04T21:07:17Z | - |
dc.date.available | 2018-07-06T11:02:17Z | - |
dc.date.issued | 1994 | - |
dc.identifier.uri | http://ntur.lib.ntu.edu.tw//handle/246246/121612 | - |
dc.language | en | en |
dc.language.iso | en_US | - |
dc.relation | Asian Test Symposium, Nara, Japan(1994.11) | en |
dc.relation | Proceedings of Asian Test Sysmposium, p.330-335 | en |
dc.relation.ispartof | Asian Test Symposium | - |
dc.title | Test Time Reduction for Scan-Designed Circuits by Sliding Compatibility | en |
dc.type | conference paper | en |
dc.relation.pages | - | - |
dc.relation.journalissue | Nara | - |
item.languageiso639-1 | en_US | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
顯示於: | 電機工程學系 |
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