https://scholars.lib.ntu.edu.tw/handle/123456789/299159
標題: | A 0.8 V switched-opamp bandpass ΔΣ modulator using a two-path architecture | 作者: | Hsiang-Hui Chang Shang-Ping Chen Kuang-Wei Cheng SHEN-IUAN LIU |
公開日期: | 八月-2002 | 起(迄)頁: | 1-4 | 來源出版物: | 2002 IEEE Asia-Pacific Conference on ASIC, AP-ASIC 2002 - Proceedings | 摘要: | In this paper, a very low-voltage fourth-order bandpass delta-sigma modulator with a two-path architecture is presented. Using the modified switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without any voltage multiplier or bootstrapping switch. Realized in a 0.25 μm 1P5M standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 60.6 db and a dynamic range (DR) of 68 db in a 30 kHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm2. © 2002 IEEE. |
URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/299159 https://www.scopus.com/inward/record.uri?eid=2-s2.0-84966293681&doi=10.1109%2fAPASIC.2002.1031517&partnerID=40&md5=8652c6a7d6a9c80e612d7fb19f5dda0b |
DOI: | 10.1109/apasic.2002.1031517 | SDG/關鍵字: | Bandpass amplifiers; Bandpass filters; CMOS integrated circuits; Delta sigma modulation; Operational amplifiers; Signal to noise ratio; Bandpass delta sigma modulators; Bandpass delta-sigma modulator; Distortion ratio; Signal bandwidth; Standard CMOS process; Supply voltages; Very low voltage; Voltage multipliers; Modulators |
顯示於: | 電機工程學系 |
在 IR 系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。