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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Stress distribution on (100) Si wafer mapped by novel I-V analysis of MOS tunneling diodes
Details
Stress distribution on (100) Si wafer mapped by novel I-V analysis of MOS tunneling diodes
Journal
IEEE Electron Device Letters
Journal Volume
24
Journal Issue
6
Pages
408-410
Date Issued
2003
Author(s)
JENN-GWO HWU
DOI
10.1109/LED.2003.813365
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-0042091972&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/301814
Type
journal article