https://scholars.lib.ntu.edu.tw/handle/123456789/313922
標題: | Analysis and architecture for memory efficient JBIG2 arithmetic encoder | 作者: | Chen, C.-C. Chang, Y.-W. Fang, H.-C. LIANG-GEE CHEN |
公開日期: | 2005 | 卷: | 2005 | 起(迄)頁: | 1191-1194 | 來源出版物: | Midwest Symposium on Circuits and Systems | 會議論文: | 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005 | 摘要: | JBIG2 is the latest International standard for bi-level Image compression. It partitions a bi-level Image Into three types of region - text, halftone, and generic region. This paper addresses the problem of large memory requirements for the contexts. The arithmetic encoders of text region In JBIG2 require a large memory for the contexts. In this work, we proposed several algorithms to reduce the memory requirements. A large portion of total memory requirements are reduced by the proposed algorithms. Moreover, the proposed algorithms are Implemented as a memory efficient hardware architecture, the unified arithmetic encoder. The experimental results show that the proposed algorithms are efficient The proposed algorithms can reduce the memory requirements for the contexts by 98.7%. Moreover, the drop of coding gain due to memory reduction for the contexts Is only 4.83% In average. © 2005 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-33847093433&doi=10.1109%2fMWSCAS.2005.1594320&partnerID=40&md5=d6659c03452ca3f971cdf83e333ae508 http://scholars.lib.ntu.edu.tw/handle/123456789/313922 |
DOI: | 10.1109/MWSCAS.2005.1594320 | SDG/關鍵字: | Algorithms; Codes (standards); Computer architecture; Computer hardware; Data storage equipment; Image compression; Arithmetic encoders; Coding gain; Generic region; Halftone region; Image coding |
顯示於: | 電機工程學系 |
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