https://scholars.lib.ntu.edu.tw/handle/123456789/365386
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | AN-YEU(ANDY) WU | zz |
dc.contributor.author | Lin, C.-H. | en_US |
dc.contributor.author | Chen, C.-Y. | en_US |
dc.contributor.author | Chang, E.-J. | en_US |
dc.contributor.author | AN-YEU(ANDY) WU | en_US |
dc.date.accessioned | 2018-09-10T08:43:18Z | - |
dc.date.available | 2018-09-10T08:43:18Z | - |
dc.date.issued | 2011 | - |
dc.identifier.uri | http://www.scopus.com/inward/record.url?eid=2-s2.0-84863068376&partnerID=MN8TOARS | - |
dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/365386 | - |
dc.description.abstract | This paper presents a turbo decoder chip design supporting distinct convolutional turbo code schemes in WiMAX and LTE systems. A contention-free vectorizable dual-standard interleaver is proposed to enhance the hardware utilization. Moreover, a warm-up free parallel MAP decoding is proposed to improve the throughput rate. The overall VLSI architecture of the proposed CTC decoder is presented for supporting the WiMAX/LTE systems. This chip fabricated in a core area of 3.38 mm 2 by 90nm CMOS process is measured at 152 MHz with a power consumption of 148.1 mW and a throughput rate of 186.1 Mbps. This chip achieves a high area efficiency of 0.36 bit/mm 2 and a low energy efficiency 0.16 nJ/bit/iteration. © 2011 IEEE. | - |
dc.language | en | en |
dc.relation.ispartof | 2011 International Symposium on Integrated Circuits | - |
dc.source | AH-Scopus to ORCID | - |
dc.subject | LTE; Multi-standard; Turbo Decoder; WiMAX | - |
dc.subject.classification | [SDGs]SDG7 | - |
dc.subject.other | 90nm CMOS; Area efficiency; Chip design; Contention-free; Convolutional turbo codes; Core area; Hardware utilization; Interleavers; LTE; MAP decoding; Multi-standard; Throughput rate; Turbo decoders; VLSI architectures; CMOS integrated circuits; Energy efficiency; Integrated circuits; Standards; Turbo codes; Wimax; Decoding | - |
dc.title | A 0.16nJ/bit/iteration 3.38mm 2 turbo decoder chip for WiMAX/LTE standards | - |
dc.type | conference paper | en |
dc.identifier.doi | 10.1109/ISICir.2011.6131904 | - |
dc.relation.pages | 168-171 | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Intel-NTU Connected Context Computing Center | - |
crisitem.author.dept | Center for Artificial Intelligence and Advanced Robotics | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Intel-NTU Connected Context Computing Center | - |
crisitem.author.dept | Center for Artificial Intelligence and Advanced Robotics | - |
crisitem.author.orcid | 0000-0003-4731-8633 | - |
crisitem.author.orcid | 0000-0003-4731-8633 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
crisitem.author.parentorg | Others: International Research Centers | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
crisitem.author.parentorg | Others: International Research Centers | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
顯示於: | 電機工程學系 |
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