High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems

Journal

IEEE Trans. Circuits and Systems, Part-II: Express Briefs

Journal Volume

53

Journal Issue

9

Pages

381-391

Date Issued

2006

Author(s)

Chih-Hsiu Lin

An-Yeu Wu

Fan-Min Li

AN-YEU(ANDY) WU

吳安宇

DOI

10.1109/tcsii.2006.881165

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/427703

Type

journal article