Improved C-V Hysteresis and Two-States Characteristics in MIS (p) Structure with Elongated Thin Metal Gate
Journal
233rd ECS Meeting
Journal Volume
85
Journal Issue
6
Pages
TU3-A4
Date Issued
2018
Author(s)
Abstract
By carefully investigating devices made from an Al/SiO2/p-Si Metal-Insulator-Semiconductor (MIS) structure with an elongated thin metal gate, the hysteresis enhancement and two-states characteristics of the capacitance-voltage profiling have been revealed. From forward and reverse C-V measurements, it was shown that the two-states phenomenon can be attributed to the minority carriers, from which can be inferred that the elongated part of gate may trigger more minority carriers to late response due to its resistive nature. In addition, we also discuss the oxide thickness in relation with the transient behavior of our devices. It is suggested that devices with properly improved transient characteristics can offer an interesting option in future DRAM memory applications.
Type
conference paper