https://scholars.lib.ntu.edu.tw/handle/123456789/429670
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | C.-H. Chang | en_US |
dc.contributor.author | K.-W. Yeh | en_US |
dc.contributor.author | J.-L. Huang | en_US |
dc.contributor.author | L.-T. Wang | en_US |
dc.contributor.author | JIUN-LANG HUANG | en_US |
dc.creator | JIUN-LANG HUANG;L.-T. Wang;J.-L. Huang;K.-W. Yeh;C.-H. Chang | - |
dc.date.accessioned | 2019-10-31T07:41:24Z | - |
dc.date.available | 2019-10-31T07:41:24Z | - |
dc.date.issued | 2015 | - |
dc.identifier.issn | 10817735 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/429670 | - |
dc.relation.ispartof | Asian Test Symposium | - |
dc.title | SDC-TPG: A deterministic zero-inflation parallel test pattern generator | en_US |
dc.type | conference paper | en |
dc.identifier.doi | 10.1109/ats.2015.15 | - |
dc.identifier.scopus | 2-s2.0-84963604830 | - |
item.openairetype | conference paper | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.fulltext | no fulltext | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Program in Integrated Circuit Design and Automation | - |
crisitem.author.orcid | 0000-0002-9425-3855 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Graduate School of Advanced Technology | - |
顯示於: | 電子工程學研究所 |
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