Chip-to-Chip Direct Interconnections by Using Controlled Flow Electroless Ni Plating
Journal
Journal of Electronic Materials
Journal Volume
46
Journal Issue
7
Pages
4321-4325
Date Issued
2017
Author(s)
Abstract
A low-temperature and pressureless process using controlled flow electroless Ni plating is developed for bonding Cu pillar bumps for chip-stacking applications. The bonding temperature can be as low as 70°C, which is the lowest among competing processes. A low bonding temperature reduces the thermomechanical stress and enhances reliability, and pressureless bonding eliminates the potential of damaging the delicate devices on chips. In this process, polydimethylsiloxane technology, which is commonly used for microelectromechanical systems fabrication, is introduced to fabricate the airtight fixture for bonding, and Ni ions are supplied by peristaltic pumping the electroless plating solution into the microchannel of a test vehicle with controlled flow. The bonded pillars were analyzed by scanning electron microscope. Besides, to further confirm and to avoid the damage created by polishing steps, a focused ion beam was also used for the observation. The results also show that dome-shaped copper pillars present void-free and seamless interconnections after plating with a 0.16 mL/min flow rate at 80°C for 2.5 h.
Publisher
Springer New York LLC
Type
journal article