Inelastic electron tunneling spectroscopy study of metal-oxide- semiconductor diodes based on high-庥 gate dielectrics
Journal
Applied Physics Letters
Journal Volume
92
Journal Issue
1
Date Issued
2008
Author(s)
Abstract
Inelastic electron tunneling spectroscopy (IETS) was applied to characterize the microstructure, interface, and trap-related states in silicon metal-oxide-semiconductor devices consisting of high-κ gate dielectrics HfO2, Y2O3, and stacked HfO2∕Y2O3 bilayer by molecular beam epitaxy and atomic layer deposition under various heat treatments. Reproducible vibrational modes of monoclinic HfO2 and cubic Y2O3 were identified from IETS spectra, along with phonon modes related to interfacial structures for a given metal-oxide-semiconductor fabrication process. A simple modeling was employed to analyze the trap related features in IETS spectra of stacked HfO2∕Y2O3 bilayers, and showed that most traps are located near the HfO2∕Y2O3 interface due to dissimilar charge distributions of two ionic oxides of different cation valences, and the presence of interfacial strains of dissimilar structures.
SDGs
Type
journal article