Buffered clock tree synthesis considering self-heating effects.
Journal
International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014
Pages
111-116
Date Issued
2014
Author(s)
Abstract
A clock tree typically consumes substantial dynamic power, and thus the considerable heat generated by itself can cause serious clock-skew variations. In this paper, we propose a self-heating-aware buffered clock tree synthesis flow. A mixed integer linear programming (MILP) formulation is proposed to simultaneously model heat spreading, place buffers, and determine a temperature-aware clock tree topology. The formulation is then transformed into a succession of low-complexity feasibility problems to further reduce the runtime. In addition, a fast superposition approach is proposed to incrementally update thermal profiles to reduce simulation time. Experimental results show that our synthesis flow can achieve averagely 50.57% worst-case clock skew reduction, compared with the original symmetrical clock tree.
SDGs
Type
conference paper