https://scholars.lib.ntu.edu.tw/handle/123456789/489637
標題: | HSAemu 2.0: Full system emulation for HSA platforms with Soft-MMU | 作者: | Hsu, H.-C. Yeh, C.-W. Hung, S.-H. Hsu, W.-C. King, C.-T. SHIH-HAO HUNG WEI-CHUNG HSU |
公開日期: | 2016 | 起(迄)頁: | 230-235 | 來源出版物: | Proceedings of the 2016 Research in Adaptive and Convergent Systems, RACS 2016 | 摘要: | With the increasing computing complexity and the prolifer- ation of data, the world demands Efficient, next-generation system architecture to enable large-scale applications at ac- ceptable costs. Heterogeneous computing has become a hot topic and a solution to achieve the goals of high performance and Efficient power consumption, especially when graphi- cal processing units (GPU's) are constantly integrated into systems-on-chips (SoC's) and are widely used for mobile de- vices. Heterogeneous System Architecture (HSA) is a series of standards provided by the HSA Foundation and designed to support heterogeneous computing, including runtime soft- ware and hardware Specifications. To support the devel- opment and optimization of HSA-compliant systems and applications, we developed a full-system emulator, called HSAemu 2.0, which meets the latest HSA 1.0 system specifi- cations and supports application development with OpenCL 2.0 features, such as shared virtual memory, device enqueue and pipe. As a hardware/software co-design tool, HSAemu 2.0 not only supports the development of heterogeneous ap- plications, but also assists system vendors in designing and evaluating the HSA runtime libraries, HSAIL compiler, and HSA hardware. © 2016 ACM. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/489637 | DOI: | 10.1145/2987386.2987431 | SDG/關鍵字: | Energy efficiency; Hardware; Hardware-software codesign; Integrated circuit design; Physical addresses; System-on-chip; Application development; Emulation; Hardware specifications; Heterogeneous computing; Heterogeneous systems; Large-scale applications; Next generation systems; OpenCL; Computer architecture |
顯示於: | 資訊工程學系 |
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