https://scholars.lib.ntu.edu.tw/handle/123456789/497929| Title: | Topology generation and floorplanning for low power application-specific network-on-chips | Authors: | Lee, W.-Y. Jiang, I.H.-R. HUI-RU JIANG |
Issue Date: | 2008 | Start page/Pages: | 283-286 | Source: | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/497929 | DOI: | 10.1109/VDAT.2008.4542468 |
| Appears in Collections: | 電機工程學系 |
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