INTEGRA: Fast multi-bit flip-flop clustering for clock power saving based on interval graphs

Journal

Proceedings of the International Symposium on Physical Design

Pages

115-121

Date Issued

2011

Author(s)

Jiang, I.H.-R.

Chang, C.-L.

Yang, Y.-M.

Tsai, E.Y.-W.

Chen, L.S.-F.

DOI

10.1145/1960397.1960424

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/497935

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-79955055429&doi=10.1145%2f1960397.1960424&partnerID=40&md5=e2b20d49bd94163708d98f4942e2cb53

Type

conference paper