A 40-GHz low-noise amplifier with a positive-feedback network in 0.18-μm CMOS
Journal
IEEE Transactions on Microwave Theory and Techniques
Journal Volume
57
Journal Issue
8
Pages
1895-1902
Date Issued
2009
Author(s)
Hsieh, H.-H.
Abstract
A novel circuit topology for a CMOS millimeter-wave low-noise amplifier (LNA) is presented in this paper. By adopting a positive-feedback network at the common-gate transistor of the input cascode stage, the small-signal gain can be effectively boosted, facilitating circuit operations at the higher frequency bands. In addition, LC ladders are utilized as the inter-stage matching for the cascaded amplifiers such that an enhanced bandwidth can be achieved. Using a standard 0.18-mum CMOS process, the proposed LNA is implemented for demonstration. At the center frequency of 40 GHz, the fabricated circuit exhibits a gain of 15 dB and a noise figure of 7.5 dB, while the return losses are better than 10 dB within the 3-dB bandwidth of 4 GHz. Operated at a 1.8-V supply, the LNA consumes a dc power of 36 mW.
SDGs
Type
journal article