A low-jitter 8-to-10GHz distributed DLL for multiple-phase clock generation
Journal
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Journal Volume
51
Pages
513-515
Date Issued
2008
Author(s)
Hsiao, K.-J.
Abstract
We demonstrate a distributed DLL with low jitter and high phase accuracy for multiphase clock generation. The frequency of operation ranges from 8 to 10GHz. The measured RMS jitter is 293.3fs and the maximum phase mismatch is 1.4ps. The distributed DLL occupies 0.03mm2 active area in a 90nm CMOS technology and draws 15mA from a 1.0V supply. ©2008 IEEE.
Other Subjects
Clocks; Jitter; 90-nm cmos; Active area; Frequency of operation; Low jitters; Maximum phase; Multiphase clock; Phase accuracy; Phase clocks; Delay lock loops
Type
conference paper