A 200-MS/s phase-detector-based comparator with 400-μVrms noise
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
63
Journal Issue
9
Pages
813-817
Date Issued
2016
Author(s)
Abstract
A low-noise phase-detector-based comparator is proposed for SAR ADCs. It can reduce the thermal-induced noise as well as the probability of the metastability. The proposed comparator is composed of two front-end dynamic comparators and a backend phase detector. The comparator has been fabricated in a 0.18-μm CMOS technology and achieves 400-μVrms noise at a conversion rate of 200 MHz under a 1.8-V supply voltage while consuming 78 μW. Its active area is 0.001 mm2. © 2016 IEEE.
Subjects
Low noise; metastability; phase-detector-based (PD-based) comparator; SAR ADC
SDGs
Other Subjects
Analog to digital conversion; Comparators (optical); Signal detection; CMOS technology; Conversion rates; Dynamic comparators; Low noise; Metastabilities; Pd-based; Phase detectors; SAR ADC; Phase comparators
Type
journal article