A semi-formal min-cost buffer insertion technique considering multi-mode multi-corner timing constraints
Journal
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Pages
505-510
Date Issued
2012
Author(s)
Abstract
Buffer Insertion has always been the most effective approach for timing optimization in VLSI designs. However, the emerging low-power design paradigm and the consideration of multiple operation modes and process corners (MMMC) have raised great challenges. Traditional dynamic-programming-based techniques are unable to cope with these challenges. In this paper, we develop a novel buffer insertion algorithm that utilizes a neighborhood restriction to simplify the constraint formulation and apply a semi-formal buffer refinement process to minimize buffer cost. The experimental results show that our tool can significantly reduce the buffer cost while meeting the MMMC timing constraints.
SDGs
Type
conference paper