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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Clock-deskew buffer using a SAR-controlled delay-locked loop
Details
Clock-deskew buffer using a SAR-controlled delay-locked loop
Journal
IEEE Journal of Solid-State Circuits
Journal Volume
35
Journal Issue
8
Pages
1128-1136
Date Issued
2000
Author(s)
Dehng, G.-K.
Hsu, J.-M.
Yang, C.-Y.
SHEN-IUAN LIU
DOI
10.1109/4.859501
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/499840
URL
https://www.scopus.com/inward/record.uri?eid=2-s2.0-0034246929&doi=10.1109%2f4.859501&partnerID=40&md5=198d5f611bdf70e3446f611436e570c1
Type
journal article