https://scholars.lib.ntu.edu.tw/handle/123456789/499885
標題: | A 3-25 Gb/s four-channel receiver with noise-canceling TIA and power-scalable sLA | 作者: | Chien, Y.-H. Fu, K.-L. SHEN-IUAN LIU |
關鍵字: | Limiting amplifier (LA); noise canceling; power scalable; transimpedance amplifier (TIA) | 公開日期: | 2014 | 卷: | 61 | 期: | 11 | 起(迄)頁: | 845-849 | 來源出版物: | IEEE Transactions on Circuits and Systems II: Express Briefs | 摘要: | A 3-25 Gb/s four-channel receiver with noise-canceling transimpedance amplifiers and power-scalable limiting amplifiers is presented. It is fabricated in a 40-nm CMOS process. Each channel provides an overall gain of 64 dB. Ω. The measured input integrated noise is 2.7 μArms, and the measured bit error rate is $< 10-12 for a 25-Gb/s pseudorandom bit sequence of 27-1. The power consumption is 103 mW per channel from a 1.3-V supply. The total area is 1.16 mm2. © 2004-2012 IEEE. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/499885 https://www.scopus.com/inward/record.uri?eid=2-s2.0-84910095005&doi=10.1109%2fTCSII.2014.2350372&partnerID=40&md5=ae40b4dac0e1b363447d19402b7e404e |
ISSN: | 15497747 | DOI: | 10.1109/TCSII.2014.2350372 | SDG/關鍵字: | Operational amplifiers; CMOS processs; Four-channel; Limiting amplifiers; Noise canceling; Power scalable; Pseudo random bit sequences; Bit error rate |
顯示於: | 電機工程學系 |
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