EPEEC: Comprehensive SPICE-compatible reluctance extraction for high-speed interconnects above lossy multilayer substrates

Journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Journal Volume

24

Journal Issue

10

Pages

1562-1570

Date Issued

2005

Author(s)

Jiang, R.

Fu, W.

CHUNG-PING CHEN

DOI

10.1109/TCAD.2005.852287

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/501060

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-27144505717&doi=10.1109%2fTCAD.2005.852287&partnerID=40&md5=34f2cad1f9be044b89fa1bfb36334255

SDGs

[SDGs]SDG9

Type

journal article