A 1 mW direct conversion receiver for the 2.4 GHz ISM band
Journal
IEEE Radio and Wireless Symposium, RWS
Journal Volume
2016-March
Pages
48-50
Date Issued
2016
Author(s)
Cruz, H.
Abstract
This paper presents a 2.4 GHz receiver front-end fabricated in 0.13um CMOS process. The front-end incorporates a narrow-band LNA and a direct-conversion sub-harmonic passive mixer. The reduced number of devices of the mixer enhances the overall noise figure (NF) while low conversion loss is effectively achieved at the same time. Quadrature generation circuit blocks were included in the chip for testing purposes. The measured NF and input third-order intercept point (IIP3) of the CMOS receiver are 4.7 dB and -2.2 dBm, respectively. The power consumption of the front-end is 1mW under 1V supply voltage. The chip size is 0.91 mm × 0.61 mm.
SDGs
Type
conference paper