60Gb/s NRZ and PAM4 transmitters for 400GbE in 65nm CMOS
Journal
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Journal Volume
57
Pages
42-43
Date Issued
2014
Author(s)
Abstract
Recent research indicates that data-link transceivers running at or below 40Gb/s are practical to implement in CMOS technology [1]. However, next-generation datacom and telecom systems require transceivers to operate at even higher data rates. For example, a 400Gb/s Ethernet system may need 8×50Gb/s PAM2 (NRZ) or PAM4 channels [2]. This paper introduces fully integrated solutions for NRZ and PAM4 transmitters. The 60Gb/s operating speed demonstrates sufficient bandwidth even for standards with coding overhead.
SDGs
Type
conference paper