https://scholars.lib.ntu.edu.tw/handle/123456789/501740
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | J. | en_US |
dc.contributor.author | Razavi | en_US |
dc.contributor.author | JRI LEE | zz |
dc.creator | J.;Razavi | - |
dc.date.accessioned | 2020-06-11T07:06:08Z | - |
dc.date.available | 2020-06-11T07:06:08Z | - |
dc.date.issued | 2005 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/501740 | - |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits | - |
dc.title | Correction to ?雓?0-Gb/s Clock and Data Recovery Circuit in 0.18-?m CMOS Technology??"Lee | en_US |
dc.type | other | en |
dc.identifier.doi | 10.1109/JSSC.2004.842373 | - |
dc.identifier.scopus | 2-s2.0-85008014487 | - |
dc.identifier.url | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85008014487&doi=10.1109%2fJSSC.2004.842373&partnerID=40&md5=262edf81b64b47a132eca105719e1c7c | - |
dc.relation.pages | 559- | - |
dc.relation.journalvolume | 40 | - |
dc.relation.journalissue | 2 | - |
item.openairecristype | http://purl.org/coar/resource_type/c_1843 | - |
item.openairetype | other | - |
item.grantfulltext | none | - |
item.cerifentitytype | Products | - |
item.fulltext | no fulltext | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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