https://scholars.lib.ntu.edu.tw/handle/123456789/501998
標題: | Universal Switch-Module Design for Symmetric-Array-Based FPGAs. | 作者: | Wong, D. F. Wong, C. K. YAO-WEN CHANG |
公開日期: | 1996 | 起(迄)頁: | 80-87 | 來源出版物: | Proceedings of the 1996 ACM 4th International Symposium on Field-Programmable Gate Arrays, FPGA 1996 | 摘要: | A switch module M with W terminals on each side is said to be universal if every set of nets satisfying the dimensional constraint (the number of nets on each side of M is at most W) is simultaneously routable through M. In this paper, we present a class of universal switch modules. Each of our switch modules has 6W switches and switch-module flexibility three (Fs = 3). We prove that no switch module with less than 6W switches can be universal. We also compare our switch modules with those used in the Xilinx XC4000 family FPGA 's and the anti-symmetric switch modules (with Fs = 3 1 ) suggested by [15]. Although these two kinds of switch modules also have Fs = 3 and 6W switches, we show that they are not universal. Based on combinatorial counting techniques, we show that each of our universal switch modules can accommodate up to 25% more routing instances, compared with the XC4000-type one of the same size. Experimental results demonstrate that our universal switch modules improve routabilty at the chip level. Finally, our work also provides a theoretical insight into the important observation by Rose and Brown [15] that Fs = 3 is often sufficient to provide high routabilty. © 1996 IEEE. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/501998 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85061359016&doi=10.1109%2fFPGA.1996.242433&partnerID=40&md5=b3a4c1392bed19465bc7d86868d912f8 |
DOI: | 10.1109/FPGA.1996.242433 | SDG/關鍵字: | Logic gates; Anti-symmetric; Chip-level; Counting techniques; Switch modules; Symmetric arrays; Field programmable gate arrays (FPGA) |
顯示於: | 電信工程學研究所 |
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