Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits

Journal

Proceedings of the Asian Test Symposium

Journal Volume

2016-February

Pages

181-186

Date Issued

2015

Author(s)

Chiang, K.-Y.

Ho, Y.-H.

Chen, Y.-W.

Pan, C.-S.

DOI

10.1109/ATS.2015.38

URI

https://scholars.lib.ntu.edu.tw/handle/123456789/505966

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-84963622288&doi=10.1109%2fATS.2015.38&partnerID=40&md5=095ade071726bed33ff8792a58c5327d

Type

conference paper