Analysis of GeOI FinFET 6T SRAM Cells With Variation-Tolerant WLUD Read-Assist and TVC Write-Assist
Journal
IEEE Transactions on Electron Devices
Journal Volume
62
Journal Issue
6
Pages
1710-1715
Date Issued
2015
Author(s)
Abstract
This paper analyzes the impacts of read-assist and write-assist circuits on GeOI FinFET 6T SRAM cells considering intrinsic random variations, process corner, and temperature variation. The word-line under-drive (WLUD) read-assist is more efficient to improve the read static noise margin and read V MIN of fast-N slow-P corner GeOI FinFET SRAM cells compared with the Silicon-On-Insulator (SOI) counterparts. GeOI FinFET SRAM cells with WLUD show less cell read access-time degradation compared with the SOI counterparts at both 25 °C and 125 °C. With transient voltage collapse (TVC) write-assist, the write-ability and variation tolerance of GeOI and SOI FinFET SRAM cells are improved. The temperature dependence of data retention time is different between the GeOI and SOI FinFET SRAM cells. The maximum TVC write-assist pulsewidth constrained by the data retention failure is smaller in GeOI FinFET SRAMs at 25 °C and becomes comparable at 125 °C compared with the SOI FinFET SRAMs. © 1963-2012 IEEE.
Subjects
GeOI FinFET; read-assist; SRAM; static noise margin; Write-assist
Other Subjects
Cells; Cytology; Digital storage; Integrated circuits; Silicon on insulator technology; Temperature distribution; GeOI FinFET; Read assists; Silicon-on- insulators (SOI); Static noise margin; Temperature dependence; Temperature variation; Variation tolerances; Write-assist; Static random access storage
Type
journal article