https://scholars.lib.ntu.edu.tw/handle/123456789/559050
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Kravets, V.N. | en_US |
dc.contributor.author | Jiang, J.-H.R. | en_US |
dc.contributor.author | Riener, H. | en_US |
dc.contributor.author | JIE-HONG JIANG | en_US |
dc.date.accessioned | 2021-05-05T02:54:51Z | - |
dc.date.available | 2021-05-05T02:54:51Z | - |
dc.date.issued | 2020 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.url?eid=2-s2.0-85087387819&partnerID=40&md5=766046202dcbecc07c9110600ea6a3a4 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/559050 | - |
dc.relation.ispartof | Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 | - |
dc.title | Learning to Automate the Design Updates from Observed Engineering Changes in the Chip Development Cycle | en_US |
dc.type | conference paper | en |
dc.identifier.doi | 10.23919/DATE48585.2020.9116310 | - |
dc.identifier.scopus | 2-s2.0-85087387819 | - |
dc.relation.pages | 738-743 | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.orcid | 0000-0002-2279-4732 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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