Development of gateless quantum hall checkerboard p-n junction devices
Journal
Journal of Physics D: Applied Physics
Journal Volume
53
Journal Issue
34
Date Issued
2020
Author(s)
Patel D.K
Patel D.K
Marzano M
Marzano M
Liu C.-I
Liu C.-I
Kruskopf M
Kruskopf M
Elmquist R.E
Rigosi A.F.
Abstract
Measurements of fractional multiples of the v=2plateau quantized Hall resistance ((RH ? 12 906 Ω) were enabled by the utilization of multiple current terminals on millimetre-scale graphene p-n junction (pnJ) devices fabricated with interfaces along both lateral directions. These quantum Hall resistance checkerboard devices have been demonstrated to match quantized resistance outputs numerically calculated with the LTspice circuit simulator. From the devices' functionality, more complex embodiments of the quantum Hall resistance checkerboard were simulated to highlight the parameter space within which these devices could operate. Moreover, these measurements suggest that the scalability of pnJ fabrication on millimetre or centimetre scales is feasible with regards to graphene device manufacturing by using the far more efficient process of standard ultraviolet lithography. ? 2020 IOP Publishing Ltd.
Subjects
Circuit simulation; Electric resistance measurement; Graphene; Graphene devices; Quantum Hall effect; Semiconductor junctions; Circuit simulators; Efficient process; Graphene p-n junctions; Lateral directions; Multiple currents; Quantized Hall resistance; Quantum Hall resistance; Ultraviolet lithography; Hall effect devices
SDGs
Type
journal article