First Vertically Stacked Tensily Strained Ge_0.98Si_0.02nGAAFETs with No Parasitic Channel and L_G= 40 nm Featuring Record I_ON= 48 μA at V_OV=V_DS=0.5V and Record G_m,max(μS/μm)/SS_SAT(mV/dec) = 8.3 at V_DS=0.5V

Si incorporation as small as 2% into Ge can achieve sufficient etching selectivity of heavily phosphorus- doped Ge sacrificial layers over unintentionally doped Ge0.98Si0.02 to form two stacked Ge0.98Si0.02 nanowire channels, and introduce 0.27% uniaxial tensile strain for the electron mobility enhancement. The alloy scattering is still minimal for 2% Si. The parasitic Ge/Si channel underneath the Ge0.98Si0.02 channels is completely removed by optimized etching. The infrared response of the parasitic channel is a non-destructive method to further confirm the removal of the parasitic channel. VT can be tuned by PMA, and ION can be enhanced by short LG. Record ION of 48 μA at VOV=VDS=0.5V and record Q (Gm,max/SSSAT) of 8.3 at VDS=0.5V with LG = 40 nm are achieved among Ge nFETs. The results are comparable to Si nFETs. ? 2019 IEEE.