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  4. Multi-bit cryogenic flash memory on Si/SiGe and Ge/GeSi heterostructures
 
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Multi-bit cryogenic flash memory on Si/SiGe and Ge/GeSi heterostructures

Journal
VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings
Date Issued
2021
Author(s)
Hou W.-C.
Hsu N.-W.
Kao H.-S.
JIUN-YUN LI  
DOI
10.1109/VLSI-TSA51926.2021.9440069
URI
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85108173170&doi=10.1109%2fVLSI-TSA51926.2021.9440069&partnerID=40&md5=258ea4f9c8d72c0f42796cacc345b116
https://scholars.lib.ntu.edu.tw/handle/123456789/581012
Abstract
To realize a full-scale solid-state computer, both quantum processors and classical logic controllers are suggested to be operated at cryogenic temperatures to avoid the issues of signal latency through the room-temperature controllers and the corresponding wiring complexity, and interface of quantum processors and classical controllers. While cryo-CMOS devices have been the main focus recently to address those issues, there were only few works on cryogenic memory devices published [1]. Potential candidates for cryogenic applications are based on Si MOS platforms, which would result in integration challenges with Si/SiGe [2] or Ge/GeSi [3] qubit devices. In this work, we demonstrate multi-bit cryogenic flash operations on both Si/SiGe and Ge/GeSi heterostructures for the first time at 4 K with a high endurance of > 103, long retention time of > 103 s, and a memory window of > 0.2V. ? 2021 IEEE.
Event(s)
2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021
Subjects
Controllers; Cryogenics; Interface states; MOS devices; Quantum theory; Silicon; VLSI circuits; Classical controllers; Classical logic; Cryogenic applications; Cryogenic temperatures; Quantum processors; Qubit devices; Retention time; Temperature controllers; Flash memory
Type
conference paper

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