https://scholars.lib.ntu.edu.tw/handle/123456789/581012
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hou W.-C. | en_US |
dc.contributor.author | Hsu N.-W. | en_US |
dc.contributor.author | Kao H.-S. | en_US |
dc.contributor.author | JIUN-YUN LI | en_US |
dc.creator | Hou W.-C;Hsu N.-W;Kao H.-S;Li J.-Y. | - |
dc.date.accessioned | 2021-09-02T00:05:40Z | - |
dc.date.available | 2021-09-02T00:05:40Z | - |
dc.date.issued | 2021 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85108173170&doi=10.1109%2fVLSI-TSA51926.2021.9440069&partnerID=40&md5=258ea4f9c8d72c0f42796cacc345b116 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/581012 | - |
dc.description.abstract | To realize a full-scale solid-state computer, both quantum processors and classical logic controllers are suggested to be operated at cryogenic temperatures to avoid the issues of signal latency through the room-temperature controllers and the corresponding wiring complexity, and interface of quantum processors and classical controllers. While cryo-CMOS devices have been the main focus recently to address those issues, there were only few works on cryogenic memory devices published [1]. Potential candidates for cryogenic applications are based on Si MOS platforms, which would result in integration challenges with Si/SiGe [2] or Ge/GeSi [3] qubit devices. In this work, we demonstrate multi-bit cryogenic flash operations on both Si/SiGe and Ge/GeSi heterostructures for the first time at 4 K with a high endurance of > 103, long retention time of > 103 s, and a memory window of > 0.2V. ? 2021 IEEE. | - |
dc.relation.ispartof | VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings | - |
dc.subject | Controllers; Cryogenics; Interface states; MOS devices; Quantum theory; Silicon; VLSI circuits; Classical controllers; Classical logic; Cryogenic applications; Cryogenic temperatures; Quantum processors; Qubit devices; Retention time; Temperature controllers; Flash memory | - |
dc.title | Multi-bit cryogenic flash memory on Si/SiGe and Ge/GeSi heterostructures | en_US |
dc.type | conference paper | en |
dc.relation.conference | 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021 | - |
dc.identifier.doi | 10.1109/VLSI-TSA51926.2021.9440069 | - |
dc.identifier.scopus | 2-s2.0-85108173170 | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.orcid | 0000-0003-4905-9954 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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