GrateTile: Efficient Sparse Tensor Tiling for CNN Processing
Journal
IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Journal Volume
2020-October
Date Issued
2020
Author(s)
Abstract
We propose GrateTile, an efficient, hardware-friendly data storage scheme for sparse CNN feature maps (activations). It divides data into uneven-sized subtensors and, with small indexing overhead, stores them in a compressed yet randomly accessible format. This design enables modern CNN accelerators to fetch and decompressed sub-tensors on-the-fly in a tiled processing manner. GrateTile is suitable for architectures that favor aligned, coalesced data access, and only requires minimal changes to the overall architectural design. We simulate GrateTile with state-of-the-art CNNs and show an average of 55% DRAM bandwidth reduction while using only 0.6% of feature map size for indexing storage. ? 2020 IEEE.
Subjects
Data Compression; Neural Network Hardware; Sparse Matrix
Other Subjects
Dynamic random access storage; Indexing (of information); Signal processing; Tensors; Bandwidth reductions; Data access; Data storage; Feature map; Indexing storage; On the flies; Sparse tensors; State of the art; Silicon compounds
Type
conference paper