https://scholars.lib.ntu.edu.tw/handle/123456789/607225
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chang S | en_US |
dc.contributor.author | JIUN-YUN LI et al. | zz |
dc.creator | Chang S;Lu T;Yang C;Yeh C;Huang M;Meng C;Chen P;Chang T;Chang Y;Jhu J;Hong T;Ke C;Yu X;Lu W;Baig M.A;Cho T;Sung P;Su C;Hsueh F;Chen B;Hu H;Wu C;Lin K;Ma W.C;Lu D.D;Kao K;Lee Y;Lin C;Huang K;Chen K;Li Y;Samukawa S;Chao T;Huang G;Wu W;Lee W;Li J;Shieh J;Tarng J;Wang Y;Yeh W. | - |
dc.date.accessioned | 2022-04-25T06:42:49Z | - |
dc.date.available | 2022-04-25T06:42:49Z | - |
dc.date.issued | 2022 | - |
dc.identifier.issn | 00189383 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85123690962&doi=10.1109%2fTED.2021.3138947&partnerID=40&md5=23d2dbe82118539a07d536321d764079 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/607225 | - |
dc.description.abstract | In this article, heterogeneous complementary field-effect-transistor (CFET) constructed by vertically stacking amorphous indium gallium zinc oxide (a-IGZO) n-channel on poly-Si p-channel with their own dielectric layer and work function metal gate inverters were demonstrated. Meanwhile, high-frequency IGZO radio frequency (RF) devices with poly-Si as guard ring material simultaneously were fabricated in the same process. High <formula> <tex>$f_{T}$</tex> </formula> and <formula> <tex>$f_{max}$</tex> </formula> IGZO Radio Frequency Integrated Circuits (RFICs) with the excellent on-off ratio need to be promoted by introducing fluorine-based gas. For the IGZO device in CFET, its threshold voltage can be tuned by the adjusted gate for ideal inverter operation at different supply voltage ( <formula> <tex>$V_{DD}$</tex> </formula> ). Moreover, the swing of the IGZO transistor and the gain extracted from voltage transfer characteristic (VTC) curves can also be improved when the controlled gate and adjusted gate are connected as an input terminal, but the <formula> <tex>$V_{TH}$</tex> </formula> tunability for the inverter is satisfied in the meantime. We also simulated 6T-SRAM circuit by SPICE model to further investigate the potential of an adjusted gate for optimizing the noise margin during SRAM operation. IEEE | - |
dc.relation.ispartof | IEEE Transactions on Electron Devices | - |
dc.subject | Complementary field-effect-transistor (CFET) | - |
dc.subject | heterogeneous integration | - |
dc.subject | hybrid complementary metal-oxide-semiconductor (Hybrid CMOS) | - |
dc.subject | indium gallium zinc oxide (IGZO) Radio Frequency Integrated Circuit (RFIC) | - |
dc.subject | Inverters | - |
dc.subject | Logic gates | - |
dc.subject | oxide semiconductor (OS) | - |
dc.subject | Radio frequency | - |
dc.subject | static random access memory (SRAM) | - |
dc.subject | Surface treatment | - |
dc.subject | Threshold voltage | - |
dc.subject | Tin | - |
dc.subject | Transistors | - |
dc.subject | vertically stacked. | - |
dc.title | First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration With Dual Work Function Gate for Ultralow-Power SRAM and RF Applications | en_US |
dc.type | journal article | - |
dc.identifier.doi | 10.1109/TED.2021.3138947 | - |
dc.identifier.scopus | 2-s2.0-85123690962 | - |
item.openairetype | journal article | - |
item.fulltext | no fulltext | - |
item.grantfulltext | none | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.orcid | 0000-0003-4905-9954 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
Appears in Collections: | 電機工程學系 |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.