https://scholars.lib.ntu.edu.tw/handle/123456789/625175
標題: | Cmos-Mems Resonators with Sub-100-Nm Transducer Gap Using Stress Engineering | 作者: | Zheng H.-S Tsai C.-P Chen T.-Y WEI-CHANG LI |
關鍵字: | capacitive transduction; CMOS-MEMS; motional impedance; resonators | 公開日期: | 2022 | 卷: | 2022-January | 起(迄)頁: | 13-16 | 來源出版物: | IEEE Symposium on Mass Storage Systems and Technologies | 摘要: | A clamped-clamped beam (CC-beam) resonator based on a 0.35-m 2-poly-4-metal CMOS-MEMS process platform with an unprecedented sub-100-nm structure-to-electrode gap has been demonstrated. Particularly, using a floating electrode connected to a doubly-clamped arc beam that displaces due to thermally-induced stress after release brings the design rule defined capacitive transduction gap of 500 nm to below 100 nm-a value that is never been seen in CMOS-MEMS resonators. Unlike the previously demonstrated approach of that uses an additional voltage to pull the resonator structure closer to the electrode, this work yields a reduced gap spacing controllable by adjusting the initial gap spacing or the arc beam dimensions readily right after release without the need for additional voltages. The resultant sub-100-nm capacitive transducer gap successfully lowers the motional impedance for a 2.27-MHz CC-beam resonator by 157.4 times, from 62.1 MO to 394.5 kO, under a DC bias 3.6V. While being demonstrated on a CC-beam resonator, the generic gap-narrowing scheme allows deployment to other resonator topologies. © 2022 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85126396722&doi=10.1109%2fMEMS51670.2022.9699732&partnerID=40&md5=ebe23879af3be4184aa175cc319f4115 https://scholars.lib.ntu.edu.tw/handle/123456789/625175 |
ISSN: | 21601968 | DOI: | 10.1109/MEMS51670.2022.9699732 | SDG/關鍵字: | Bacteriophages; Crystal resonators; Electrodes; Mechanics; MEMS; Microelectromechanical devices; Transducers; Beam resonators; Capacitive transductions; Clamped-clamped beam; CMOS-MEMS; Gap spacing; MEM resonator; MEMS resonators; Motional impedance; Stress engineering; Sub-100 nm; CMOS integrated circuits |
顯示於: | 應用力學研究所 |
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