https://scholars.lib.ntu.edu.tw/handle/123456789/632201
標題: | Mobility Enhancement and Abnormal Humps in Top-Gate Self-Aligned Double-Layer Amorphous InGaZnO TFTs | 作者: | Lee M.-X Chiu J.-C Li S.-L Sarkar E Chen Y.-C Yen C.-C Chen T.-L Chou C.-H CHEE-WEE LIU |
關鍵字: | a-IGZO; hump; polymer film on array (PFA); Positive bias stress (PBS) | 公開日期: | 2022 | 卷: | 10 | 起(迄)頁: | 301-308 | 來源出版物: | IEEE Journal of the Electron Devices Society | 摘要: | The mobility enhancement and the positive bias stress of top-gate self-aligned TFTs using the a-IGZO channel with a front barrier are investigated. The a-IGZO front barrier can keep electrons in the a-IGZO channel away from the top-gate oxide to significantly enhance the electron mobility at the top gate operation. The parasitic channel induces a hump in the transfer characteristics. The positive bias stress shifts the hump to the negative voltage abnormally. The H2O in the polymer film on array layer is responsible for the abnormal shift. The H2O diffuses into the top-gate insulator and is electrolyzed to create H+, which forms a parasitic channel with a negative shift of threshold voltage, leading to the abnormal hump. The abnormal humps are increasingly significant with the increasing channel width and the decreasing channel length. The channel width dependence on positive bias stress is due to the inverse narrow width effect caused by the fringe electric field. The channel length dependence on positive bias stress is due to the H+ diffusion toward the center of the parasitic channel from both the source and drain sides. © 2013 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85127460245&doi=10.1109%2fJEDS.2022.3163774&partnerID=40&md5=4ab633ece3e427cee6b6caefd7e854ab https://scholars.lib.ntu.edu.tw/handle/123456789/632201 |
ISSN: | 21686734 | DOI: | 10.1109/JEDS.2022.3163774 | SDG/關鍵字: | Amorphous films; Bias voltage; Computer circuits; Electric fields; Gallium compounds; Hydrogen; Iron; Polymer films; Semiconducting films; Semiconducting indium compounds; Thin film circuits; Thin film transistors; Thin films; Threshold voltage; Zinc compounds; Bias stress; C. thin film transistor (TFT); Hump; Mobility enhancement; Parasitics; Parasitics capacitance; Polymer film on array .; Positive bias; Positive bias stress; Top gate; Capacitance |
顯示於: | 電機工程學系 |
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