https://scholars.lib.ntu.edu.tw/handle/123456789/632286
標題: | Evaluation of Read- and Write-Assist circuits for GeOI FinFET 6T SRAM cells | 作者: | VITA PI-HO HU Fan M.-L Su P Chuang C.-T. |
關鍵字: | GeOI FinFET; Read-Assist; SRAM; Static Noise Margin; Write-Assist | 公開日期: | 2014 | 起(迄)頁: | 1122-1125 | 來源出版物: | Proceedings - IEEE International Symposium on Circuits and Systems | 摘要: | This paper evaluates the impacts of Read- and Write-Assist circuits on the GeOI FinFET 6T SRAM cells compared with the SOI counterparts. The Word-Line Under-Drive (WLUD) Read-Assist is more efficient to improve the Read Static Noise Margin (RSNM) and Read VMIN of FNSP GeOI FinFET SRAM cells compared with the SOI counterparts. GeOI FinFET SRAM cells with WLUD show smaller cell Read access-time compared with the SOI FinFET SRAM cells at both 25°C and 125 °C. Negative Bit-Line (NBL) Write-Assist is more efficient to improve the Write Static Noise Margin (WSNM) than VCS (cell supply) lowering for both GeOI and SOI FinFET SRAM cells. NBL Write-Assist shows larger WSNM improvement for GeOI FinFET SRAM cells than the SOI counterparts at 125°C. © 2014 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84907417387&doi=10.1109%2fISCAS.2014.6865337&partnerID=40&md5=978017cc451120b594c4a0d17679804e https://scholars.lib.ntu.edu.tw/handle/123456789/632286 |
ISSN: | 2714310 | DOI: | 10.1109/ISCAS.2014.6865337 | SDG/關鍵字: | Cells; Cytology; Integrated circuits; 6t sram cells; Bit lines; GeOI FinFET; Read assists; Read static noise margin (RSNM); SOI FinFETs; Static noise margin; Write-Assist; Static random access storage |
顯示於: | 電機工程學系 |
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