https://scholars.lib.ntu.edu.tw/handle/123456789/632294
Title: | Stability analysis for UTB GeOI 6T SRAM cells considering NBTI and PBTI | Authors: | VITA PI-HO HU Fan M.-L Su P Chuang C.-T. |
Issue Date: | 2015 | Journal Volume: | 2015-June | Source: | International Symposium on VLSI Technology, Systems, and Applications, Proceedings | Abstract: | This paper investigates the impacts of Negative and Positive Bias Temperature Instabilities (NBTI and PBTI) on the stability of Ultra-Thin-Body (UTB) GeOI 6T SRAMs compared with the SOI counterparts. Worst case stress scenarios for Read and Write operations are analyzed. For UTB GeOI SRAMs, PBTI dominates the degradations in Read Static Noise Margin (RSNM) and Hold Static Noise Margin (HSNM), while for UTB SOI SRAMs, NBTI dominates the degradations in RSNM and HSNM. Write Static Noise Margin (WSNM) only slightly degrades due to NBTI and PBTI. Threshold voltage design and Word-Line Under-Drive (WLUD) Read-Assist techniques are analyzed to mitigate/compensate the stability degradations due to NBTI/PBTI for UTB GeOI SRAM cells. Compared with the nominal UTB GeOI SRAM cells with low-Vth design, UTB GeOI SRAMs with high-Vth design suffer less NBTI/PBTI degradations and exhibit significant improvement in RSNM and HSNM compared with the nominal UTB SOI SRAMs. © 2015 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84940766269&doi=10.1109%2fVLSI-TSA.2015.7117556&partnerID=40&md5=80c4abf5aed1b79b016d174300c9a958 https://scholars.lib.ntu.edu.tw/handle/123456789/632294 |
ISSN: | 19308868 | DOI: | 10.1109/VLSI-TSA.2015.7117556 | SDG/Keyword: | Integrated circuit design; Negative bias temperature instability; Static random access storage; Threshold voltage; VLSI circuits; 6t sram cells; Positive bias temperature instabilities; Read assists; Read static noise margin (RSNM); Stability analysis; Static noise margin; Ultra-thin-body; Write operations; Germanium compounds |
Appears in Collections: | 電機工程學系 |
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