https://scholars.lib.ntu.edu.tw/handle/123456789/633882
標題: | Automatic test configuration and pattern generation (ATCPG) for neuromorphic chips | 作者: | Chiu, I. Wei Chen, Xin Ping Hu, Jennifer Shueh Inn CHIEN-MO LI |
關鍵字: | neuromorphic chip | Spiking Neural Network | test pattern generation | 公開日期: | 30-十月-2022 | 來源出版物: | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 摘要: | The demand for low-power, high-performance neuromorphic chips is increasing. However, conventional testing is not applicable to neuromorphic chips due to three reasons: (1) lack of scan DfT, (2) stochastic characteristic, and (3) configurable functionality. In this paper, we present an automatic test configuration and pattern generation (ATCPG) method for testing a configurable stochastic neuromorphic chip without using scan DfT. We use machine learning to generate test configurations. Then, we apply a modified fast gradient sign method to generate test patterns. Finally, we determine test repetitions with statistical power of test. We conduct experiments on one of the neuromorphic architectures, spiking neural network, to evaluate the effectiveness of our ATCPG. The experimental results show that our ATCPG can achieve 100% fault coverage for the five fault models we use. For testing a 3-layer model at 0.05 significant level, we produce 5 test configurations and 67 test patterns. The average test repetitions of neuron faults and synapse faults are 2,124 and 4,557, respectively. Besides, our simulation results show that the overkill matched our significance level perfectly. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/633882 | ISBN: | 9781450392174 | ISSN: | 10923152 | DOI: | 10.1145/3508352.3549422 |
顯示於: | 電機工程學系 |
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