https://scholars.lib.ntu.edu.tw/handle/123456789/639724
標題: | High-Speed, Low-Storage Power and Thermal Predictions for ATPG Test Patterns | 作者: | Liang, Zhe Jia Wu, Yu Tsung Yang, Yun Feng CHIEN-MO LI Chang, Norman Kumar, Akhilesh Li, Ying Shiun |
關鍵字: | ATPG test patterns | machine learning | power prediction | thermal prediction | 公開日期: | 1-一月-2023 | 來源出版物: | Proceedings - International Test Conference | 摘要: | High test power causes thermal damage to chips under test. We need power and thermal analyses to ensure thermal safety of ATPG patterns. This requires long runtime and large disk storage because there are many cycles in ATPG patterns. In this paper, we propose power and thermal predictions for test applications. To save runtime, we use multiple ML models and decay surface models for power and thermal predictions, respectively. To save storage, we build features from flip-flop values, so we don't need internal logic values from gate-level simulation. Our mean absolute percentage error (MAPE) for power prediction is less than 8%. Our mean absolute error (MAE) for thermal prediction is less than 1.2°C. We enable transient thermal analysis of long ATPG patterns, with 75X runtime speedup and 118X storage reduction. Our predictions are scalable with test speed, so they can be used to optimize test time while ensuring thermal safety. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/639724 | ISBN: | 9798350343250 | ISSN: | 10893539 | DOI: | 10.1109/ITC51656.2023.00037 |
顯示於: | 電機工程學系 |
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