https://scholars.lib.ntu.edu.tw/handle/123456789/640830
標題: | Status and Performance of Integration Modules Toward Scaled CMOS with Transition Metal Dichalcogenide Channel | 作者: | Chou, Ang Sheng Hsu, Ching Hao Lin, Yu Tung Arutchelvan, Goutham Chen, Edward Hung, Terry Y.T. Hsu, Chen Feng Chou, Sui An Lee, Tsung En Madia, Oreste Doornbos, Gerben Su, Yuan Chun Azizi, Amin Sathaiya, D. Mahaveer Cai, Jin Wang, Jer Fu Chung, Yun Yan Wu, Wen Chia Neilson, Katie Yun, Wei Sheng Hsu, Yu Wei Hsu, Ming Chun Hou, Fa Rong Shen, Yun Yang Chien, Chao Hsin Wu, Chung Cheng Wu, Jeff Wong, H. S.Philip Chang, Wen Hao Van Dal, Mark Cheng, Chao Ching CHIH-I WU Radu, Iuliana P. |
公開日期: | 1-一月-2023 | 來源出版物: | Technical Digest - International Electron Devices Meeting, IEDM | 摘要: | Two-dimensional (2D) transition metal dichalcogenide (TMD) materials are regarded as promising channel candidates for extreme contacted gate pitch (CGP) scaling. However, basic demonstration of the modules required to build logic devices is limited. For the first time, we demonstrate comparable n-type and p-type high-performance on 2D transistors. Translation to 300 mm wafer processing is tested by die-by-die transfer of the 2D material. The 300 mm fabrication preserves a relatively high mobility of 30 cm2/V•s. We demonstrate scaling of nMOS contact length (LC) to 12 nm and top gate length (LG) to 10 nm. Devices maintain high current density at short LC as well as in top-gate only operation. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/640830 | ISBN: | 9798350327670 | ISSN: | 01631918 | DOI: | 10.1109/IEDM45741.2023.10413779 |
顯示於: | 電機工程學系 |
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