A 2 μ A Iq Passive-Ramp-Adaptive-Extended-TON Controlled Buck Converter Leveraging Clamped Adaptive Biased Error Amplifier to Achieve DVS/Load Transient One-Cycle Recovery Time
Journal
IEEE Transactions on Circuits and Systems I: Regular Papers
Journal Volume
71
Journal Issue
11
Start Page
4924
End Page
4936
ISSN
1549-8328
1558-0806
Date Issued
2024-11
Author(s)
Abstract
This paper introduces a low quiescent current buck converter tailored for mobile System-on-Chip (SoC) applications, featuring one-cycle dynamic voltage scaling (DVS) and load transient response, which prior arts cannot achieve simultaneously. A passive ramp adaptive extended-on-time (PSR-AETON ) control scheme ensures efficient operation under varying load conditions, particularly during mobile device gaming and sleeping. The modulation strategy, analyzed via small signal analysis, exhibits a 0 pole in-band characteristic, enabling a simple type-I integrator error amplifier (EA) for regulation. This allows the quiescent current of EA to be scalable with its compensation capacitor. A dynamic-biased EA is further proposed to enhance DVS tracking speed with the 1/3 response time of conventional EA. Additionally, the extended-TON and clamping mechanism address output saturation of the EA reduced the output voltage drop to 1/4 and enables seamless transitions from continuous conduction mode (CCM) to discontinuous conduction mode (DCM). Fabricated using a TSMC 0.18μm CMOS process, the chip operates at a 4 MHz switching frequency in CCM, exhibits a μ A quiescent current, and achieves >85% efficiency across 30000 times load current difference (40μ A to 1.2A). It demonstrates a 2.8μ s DVS settling time. It showcases an 80 mV undershoot voltage and 1.96μ s recovery time for a 1.8 A/200 ns current step in load transient response, seamlessly transitioning between CCM and DCM within a 24 mV deviation.
SDGs
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Type
journal article